The present invention relates to integrated circuits, and more specifically, to interfacing configurable system logic with a configurable system bus.
Configurable processor system units (CPSUs) typically integrate a central processing unit (CPU), an internal system bus, programmable logic and various system resources that are interconnected and communicate via the system bus. In many systems, a byte (e.g., 8-bits) is considered to be the basic unit for data transfers. Typically, higher performance systems utilize a 32-bit or wider bus to improve data bandwidth. However, most systems include devices that only support a one or two byte-wide interface.
In the past, system designers have relied upon different operating modes of the system bus to allow simple connections to narrower interfaces. For example, many 32-bit wide busses have special 8-bit and 16-bit access modes. However, when developing programmable logic for a system bus that supports various operating modes, designers typically have to design their own hardwired interface to the bus. Having to design a separate interface for each programmable logic application is not efficient since it often requires additional time and expense. Therefore what is desired is a programmable interface that is capable of connecting programmable logic to a system bus that operates according to a plurality of operation modes.
According to one embodiment, a system is disclosed. The system includes a system interconnect, programmable logic and interface logic coupled to the system interconnect and the programmable logic. The interface logic is adaptable to connect the programmable logic to the system interconnect via one of a plurality of access modes supported by the system interconnect.